Andrew M. Romero
IP Logic Design & Verification Engineer
currently
I'm looking for either a place to stay or a roommate in SF. See the interactive map of where I'm interested in living.
about me
Engineer at Intel, integrating IP blocks into SoCs and verifying the design.
Lately interested in agentic harness engineering for applications from neural network optimization to RTL design and verification.
where i've been
2024 — PresentIntel · Santa Clara, CA
2022–24Stanford University · MS EE
2022Celera Technologies · Santa Clara, CA
2021Nova Measuring Instruments · Fremont, CA
2018–22CSU Chico · BS EE, magna cum laude
interests
Automation, audio production, generative ML for music, teaching. Fluent in English and Spanish.